SPARC T5 (early next year)
- 16 Cores 128 threads
 - 28nm
 - 25% increased thread performance to T4
 - 2.5x throughput compared to T4
 - Scales from 1 to 8 processors
 - PCIe Gen 3
 - 8MB L3 cache
 - LDOM virtualization (as with all previous T-series)
 - Solaris 10 update 11 or Solaris 11.1
 
- 6 cores 48 threads
 - Scales to 32+ sockets
 - 48MB L2 cache
 - 28nm
 - 3.6GHz
 - 5-6x performance per socket compared to M-series
 - LDOM virtualization
 - 32TB+ memory configurations
 - Solaris 11 only (but S10 support in LDOM)
 
- LDOM virtualization
 - 16 cores 32 threads
 - 24MB L2 Cache
 - 3 GHz
 - On Chip DB floating point
 - Crypto acceleration
 - Runs both S10 and S11 in lab
 
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